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Espressif Systems /ESP32-H2 /RMT /CH1_TX_CONF0

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Interpret as CH1_TX_CONF0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TX_START)TX_START 0 (MEM_RD_RST)MEM_RD_RST 0 (APB_MEM_RST)APB_MEM_RST 0 (TX_CONTI_MODE)TX_CONTI_MODE 0 (MEM_TX_WRAP_EN)MEM_TX_WRAP_EN 0 (IDLE_OUT_LV)IDLE_OUT_LV 0 (IDLE_OUT_EN)IDLE_OUT_EN 0 (TX_STOP)TX_STOP 0DIV_CNT0MEM_SIZE 0 (CARRIER_EFF_EN)CARRIER_EFF_EN 0 (CARRIER_EN)CARRIER_EN 0 (CARRIER_OUT_LV)CARRIER_OUT_LV 0 (AFIFO_RST)AFIFO_RST 0 (CONF_UPDATE)CONF_UPDATE

Description

Channel 1 configure register 0

Fields

TX_START

Set this bit to start sending data on CHANNEL%s.
MEM_RD_RST

Set this bit to reset read ram address for CHANNEL%s by accessing transmitter.
APB_MEM_RST

Set this bit to reset W/R ram address for CHANNEL%s by accessing apb fifo.
TX_CONTI_MODE

Set this bit to restart transmission from the first data to the last data in CHANNEL%s.
MEM_TX_WRAP_EN

This is the channel %s enable bit for wraparound mode: it will resume sending at the start when the data to be sent is more than its memory size.
IDLE_OUT_LV

This bit configures the level of output signal in CHANNEL%s when the latter is in IDLE state.
IDLE_OUT_EN

This is the output enable-control bit for CHANNEL%s in IDLE state.
TX_STOP

Set this bit to stop the transmitter of CHANNEL%s sending data out.
DIV_CNT

This register is used to configure the divider for clock of CHANNEL%s.
MEM_SIZE

This register is used to configure the maximum size of memory allocated to CHANNEL%s.
CARRIER_EFF_EN

1: Add carrier modulation on the output signal only at the send data state for CHANNEL%s. 0: Add carrier modulation on the output signal at all state for CHANNEL%s. Only valid when RMT_CARRIER_EN_CH%s is 1.
CARRIER_EN

This is the carrier modulation enable-control bit for CHANNEL%s. 1: Add carrier modulation in the output signal. 0: No carrier modulation in sig_out.
CARRIER_OUT_LV

This bit is used to configure the position of carrier wave for CHANNEL%s.

1’h0: add carrier wave on low level.

1’h1: add carrier wave on high level.
AFIFO_RST

Reserved
CONF_UPDATE

synchronization bit for CHANNEL%s

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data